mirror of https://framagit.org/kyodev/kyopages.git
208 lines
11 KiB
Markdown
208 lines
11 KiB
Markdown
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# kernel boot options
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## AMD64 specific boot options
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There are many others (usually documented in driver documentation), but only the AMD64 specific ones are listed here.
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Machine check, please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
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* **mce=off** Disable machine check
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* **mce=no_cmci** Disable CMCI(Corrected Machine Check Interrupt) that Intel processor supports. Usually
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this disablement is not recommended, but it might be handy if your hardware is misbehaving. Note that you'll
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get more problems without CMCI than with due to the shared banks, i.e. you might get duplicated error logs.
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* **mce=dont_log_ce** Don't make logs for corrected errors. All events reported as corrected are silently
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cleared by OS. This option will be useful if you have no interest in any of corrected errors.
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* **mce=ignore_ce** Disable features for corrected errors, e.g. polling timer and CMCI. All events reported
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as corrected are not cleared by OS and remained in its error banks. Usually this disablement is not recommended,
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however if there is an agent checking/clearing corrected errors
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(e.g. BIOS or hardware monitoring applications), conflicting with OS's error handling, and you cannot
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deactivate the agent, then this option will be a help.
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* **mce=no_lmce**
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Do not opt-in to Local MCE delivery. Use legacy method to broadcast MCEs.
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* **mce=bootlog**
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Enable logging of machine checks left over from booting. Disabled by default on AMD because
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some BIOS leave bogus ones. If your BIOS doesn't do that it's a good idea to enable though to make sure you log
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even machine check events that result in a reboot. On Intel systems it is enabled by default.
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* **mce=nobootlog**
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Disable boot machine check logging.
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* **mce=tolerancelevel[,monarchtimeout] (number,number)**
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tolerance levels:
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0: always panic on uncorrected errors, log corrected errors
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1: panic or SIGBUS on uncorrected errors, log corrected errors
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2: SIGBUS or log uncorrected errors, log corrected errors
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3: never panic or SIGBUS, log all errors (for testing only)
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Default is 1
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Can be also set using sysfs which is preferable.
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monarchtimeout: Sets the time in us to wait for other CPUs on machine checks. 0 to disable.
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* **mce=bios_cmci_threshold**
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Don't overwrite the bios-set CMCI threshold. This boot option prevents Linux from overwriting the CMCI
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threshold set by the bios. Without this option, Linux always sets the CMCI threshold to 1. Enabling
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this may make memory predictive failure analysis less effective if the bios sets thresholds for memory
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errors since we will not see details for all errors.
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* **mce=recovery**
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Force-enable recoverable machine check code paths
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* **nomce** (for compatibility with i386): same as mce=off
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Everything else is in sysfs now.
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## APICs
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* **apic** Use IO-APIC. Default
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* **noapic** Don't use the IO-APIC.
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* **disableapic** Don't use the local APIC
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* **nolapic** Don't use the local APIC (alias for i386 compatibility)
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* **pirq=**... See Documentation/x86/i386/IO-APIC.txt
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* **noapictimer** Don't set up the APIC timer
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* **no_timer_check** Don't check the IO-APIC timer. This can work around problems with incorrect timer
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initialization on some boards.
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* **apicpmtimer** Do APIC timer calibration using the pmtimer. Implies apicmaintimer. Useful when your
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PIT timer is totally broken.
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## Timing
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* **notsc** Don't use the CPU time stamp counter to read the wall time. This can be used to work around timing
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problems on multiprocessor systems with not properly synchronized CPUs.
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* **nohpet** Don't use the HPET timer.
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## Idle loop
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* **idle=poll** Don't do power saving in the idle loop using HLT, but poll for rescheduling event. This will
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make the CPUs eat a lot more power, but may be useful to get slightly better performance in multiprocessor
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benchmarks. It also makes some profiling using performance counters more accurate. Please note that on systems
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with MONITOR/MWAIT support (like Intel EM64T CPUs) this option has no performance advantage over the normal
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idle loop. It may also interact badly with hyperthreading.
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## Rebooting
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* **reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]**
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* **bios** Use the CPU reboot vector for warm reset
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* **warm** Don't set the cold reboot flag
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* **cold** Set the cold reboot flag
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* **triple** Force a triple fault (init)
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* **kbd** Use the keyboard controller. cold reset (default)
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* **acpi** Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the ACPI reset does not work,
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the reboot path attempts the reset using the keyboard controller.
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* **efi** Use efi reset_system runtime service. If EFI is not configured or the EFI reset does not work,
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the reboot path attempts the reset using the keyboard controller.
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Using warm reset will be much faster especially on big memory systems because the BIOS will not go through
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the memory check. Disadvantage is that not all hardware will be completely reinitialized on reboot so there
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may be boot problems on some systems.
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* **reboot=force** Don't stop other CPUs on reboot. This can make reboot more reliable in some cases.
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## Non Executable Mappings
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* **noexec=on|off**
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* **on** Enable(default)
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* **off** Disable
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## NUMA
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* **numa=off** Only set up a single NUMA node spanning all memory.
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* **numa=noacpi** Don't parse the SRAT table for NUMA setup
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* **numa=fake=size[MG]** If given as a memory unit, fills all system RAM with nodes of
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size interleaved over physical nodes.
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* **numa=fake=N** If given as an integer, fills all system RAM with N fake nodes interleaved over physical nodes.
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## ACPI
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* **acpi=off** Don't enable ACPI
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* **acpi=ht** Use ACPI boot table parsing, but don't enable ACPI interpreter (Deactivates the ACPI system almost completely; only the components required
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for hyper threading will be used
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* **acpi=force** Force ACPI on (currently not needed)(Activates the ACPI system even if your computer BIOS date is older than 2000. This parameter
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overrides acpi=off and can also be used with current hardware if the ACPI support is not
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activated despite apm=off)
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* **acpi=strict** Disable out of spec ACPI workarounds.
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* **acpi_sci={edge,level,high,low}** Set up ACPI SCI interrupt.
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* **acpi=noirq** Don't route interrupts
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* **acpi=nocmcff** Disable firmware first mode for corrected errors. This disables parsing the HEST CMC
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error source to check if firmware has set the FF flag. This may result in duplicate corrected error reports.
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## PCI
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* **pci=off** Don't use PCI
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* **pci=conf1** Use conf1 access.
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* **pci=conf2** Use conf2 access.
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* **pci=rom** Assign ROMs.
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* **pci=assign-busses** Assign busses
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* **pci=irqmask=MASK** Set PCI interrupt mask to MASK
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* **pci=lastbus=NUMBER** Scan up to NUMBER busses, no matter what the mptable says.
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* **pci=noacpi** Don't use ACPI to set up PCI interrupt routing.
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## IOMMU (input/output memory management unit)
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Currently four x86-64 PCI-DMA mapping implementations exist:
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1. arch/x86_64/kernel/pci-nommu.c: use no hardware/software IOMMU at all (e.g. because you have < 3 GB memory).
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Kernel boot message: "PCI-DMA: Disabling IOMMU"
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2. arch/x86/kernel/amd_gart_64.c: AMD GART based hardware IOMMU. Kernel boot message: "PCI-DMA: using GART IOMMU"
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3. arch/x86_64/kernel/pci-swiotlb.c : Software IOMMU implementation. Used e.g. if there is no hardware IOMMU
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in the system and it is need because you have >3GB memory or told the kernel to us it (iommu=soft)) Kernel boot
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message: "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)"
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4. arch/x86_64/pci-calgary.c : IBM Calgary hardware IOMMU. Used in IBM pSeries and xSeries servers. This hardware
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IOMMU supports DMA address mapping with memory protection, etc. Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
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**iommu=[size][,noagp][,off][,force][,noforce][,leak[=nr_of_leak_pages]
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[,memaper[=order]][,merge][,forcesac][,fullflush][,nomerge][,noaperture][,calgary]**
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General iommu options:
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* **off** Don't initialize and use any kind of IOMMU.
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* **noforce** Don't force hardware IOMMU usage when it is not needed. (default).
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* **force** Force the use of the hardware IOMMU even when it is not actually needed (e.g. because < 3 GB memory).
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* **soft** Use software bounce buffering (SWIOTLB) (default for Intel machines). This can be used to prevent the usage
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of an available hardware IOMMU.
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iommu options only relevant to the AMD GART hardware IOMMU:
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* **size** Set the size of the remapping area in bytes.
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* **allowed** Overwrite iommu off workarounds for specific chipsets.
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* **fullflush** Flush IOMMU on each allocation (default).
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* **nofullflush** Don't use IOMMU fullflush.
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* **leak** Turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on). Default number of leak pages is 20.
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* **memaper[=order]** Allocate an own aperture over RAM with size 32MB<<order. (default: order=1, i.e. 64MB)
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* **merge** Do scatter-gather (SG) merging. Implies "force" (experimental).
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* **nomerge** Don't do scatter-gather (SG) merging.
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* **noaperture** Ask the IOMMU not to touch the aperture for AGP.
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* **forcesac** Force single-address cycle (SAC) mode for masks <40bits (experimental).
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* **noagp** Don't initialize the AGP driver and use full aperture.
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* **allowdac** Allow double-address cycle (DAC) mode, i.e. DMA >4GB. DAC is used with 32-bit PCI to push a
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64-bit address in two cycles. When off all DMA over >4GB is forced through an IOMMU or software bounce buffering.
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* **nodac** Forbid DAC mode, i.e. DMA >4GB.
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* **panic** Always panic when IOMMU overflows.
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* **calgary** Use the Calgary IOMMU if it is available
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iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU implementation:
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* **swiotlb=pages[,force]**
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* **pages** Prereserve that many 128K pages for the software IO bounce buffering.
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* **force** Force all IO through the software TLB.
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Settings for the IBM Calgary hardware IOMMU currently found in IBM pSeries and xSeries machines:
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* **calgary=[64k,128k,256k,512k,1M,2M,4M,8M]**
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* **calgary=[translate_empty_slots]**
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* **calgary=[disable=PCI bus number]**
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* **panic** Always panic when IOMMU overflows
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64k,...,8M - Set the size of each PCI slot's translation table when using the Calgary IOMMU. This is the size
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of the translation table itself in main memory. The smallest table, 64k, covers an IO space of 32MB;
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the largest, 8MB table, can cover an IO space of 4GB. Normally the kernel will make the right choice by itself.
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translate_empty_slots - Enable translation even on slots that have no devices attached to them, in case
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a device will be hotplugged in the future.
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**disable=PCI bus number** - Disable translation on a given PHB. For example, the built-in graphics adapter
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resides on the first bridge (PCI bus number 0); if translation (isolation) is enabled on this bridge, X servers
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that access the hardware directly from user space might stop working. Use this option if you have devices that
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are accessed from userspace directly on some PCI host bridge.
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## Miscellaneous
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* **nogbpages** Do not use GB pages for kernel direct mappings.
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* **gbpages** Use GB pages for kernel direct mappings.
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[kernel Doc](https://www.kernel.org/doc/Documentation/)
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