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@ -261,7 +261,7 @@ CLFLUSHOPT ⟷ CLFLUSHOPT instruction
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CLWB ⟷ CLWB instruction
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CQM ⟷ Cache QoS Monitoring
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ERMS ⟷ Enhanced REP MOVSB/STOSB
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FSGSBASE ⟷ {RD/WR}{FS/GS}BASE instructions*/
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FSGSBASE ⟷ {RD/WR}{FS/GS}BASE instructions
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HLE ⟷ Hardware Lock Elision
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INVPCID ⟷ Invalidate Processor Context ID
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MPX ⟷ Memory Protection Extension
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@ -360,7 +360,7 @@ V_VMSAVE_VMLOAD ⟷ Virtual VMSAVE VMLOAD
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* CPUID level 0x00000007:0 (ecx), word 16
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```
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AVX512VBMI ⟷ AVX512 Vector Bit Manipulation instructions*/
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AVX512VBMI ⟷ AVX512 Vector Bit Manipulation instructions
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AVX512_VPOPCNTDQ ⟷ POPCNT for vectors of DW/QW
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LA57 ⟷ 5-level page tables
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OSPKEOS ⟷ Protection Keys Enable
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@ -378,3 +378,240 @@ OVERFLOW_RECOV ⟷ MCA overflow recovery support
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SMCA ⟷ Scalable MCA
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SUCCOR ⟷ Uncorrectable error containment and recovery
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```
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# Ensemble trié
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```
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3DNOW ⟷ 3DNow!
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3DNOWEXT ⟷ AMD 3DNow! extensions
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3DNOWPREFETCH ⟷ 3DNow prefetch instructions
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ABM ⟷ Advanced bit manipulation
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ACC_POWERAMD ⟷ Accumulated Power Mechanism
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ACE2 ⟷ Advanced Cryptography Engine v2
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ACE2_EN ⟷ ACE v2 enabled
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ACE_EN ⟷ on-CPU crypto enabled
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ACE ⟷ on-CPU crypto (xcrypt)
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ACPI ⟷ ACPI via MSR
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ADX ⟷ The ADCX and ADOX instructions
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AES ⟷ AES instructions
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ALWAYS ⟷ Always-present feature
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AMD_DCM ⟷ multi-node processor
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APERFMPERF ⟷ APERFMPERF
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APIC ⟷ Onboard APIC
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ARAT ⟷ Always Running APIC Timer
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ARCH_PERFMON ⟷ Intel Architectural PerfMon
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ART ⟷ Platform has always running timer (ART)
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AVIC ⟷ Virtual Interrupt /Controller
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AVX2 ⟷ AVX2 instructions
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AVX512_4FMAPS ⟷ AVX-512 Multiply Accumulation Single precision
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AVX512_4VNNIW ⟷ AVX-512 Neural Network Instructions
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AVX512BW ⟷ AVX-512 BW (Byte/Word granular) Instructions
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AVX512CD ⟷ AVX-512 Conflict Detection
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AVX512DQ ⟷ AVX-512 DQ (Double/Quad granular) Instructions
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AVX512ER ⟷ AVX-512 Exponential and Reciprocal
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AVX512F ⟷ AVX-512 Foundation
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AVX512IFMA ⟷ AVX-512 Integer Fused Multiply-Add instructions
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AVX512PF ⟷ AVX-512 Prefetch
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AVX512VBMI ⟷ AVX512 Vector Bit Manipulation instructions
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AVX512VL ⟷ AVX-512 VL (128/256 Vector Length) Extensions
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AVX512_VPOPCNTDQ ⟷ POPCNT for vectors of DW/QW
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AVX ⟷ Advanced Vector Extensions
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BMI1 ⟷ 1st group bit manipulation extensions
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BMI2 ⟷ 2nd group bit manipulation extensions
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BPEXT ⟷ data breakpoint extension
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BTS Branch ⟷ Trace Store
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CAT_L2 ⟷ Cache Allocation Technology L2
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CAT_L3 ⟷ Cache Allocation Technology L3
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CDP_L3 ⟷ Code and Data Prioritization L3
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CENTAUR_MCR ⟷ Centaur MCRs (= MTRRs)
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CID ⟷ Context ID
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CLFLUSH ⟷ CLFLUSH instruction
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CLFLUSHOPT ⟷ CLFLUSHOPT instruction
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CLWB ⟷ CLWB instruction
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CLZERO ⟷ CLZERO instruction
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CMOV ⟷ CMOV instructions (plus FCMOVcc, FCOMI with FPU)
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CMP_LEGACY ⟷ If yes HyperThreading not valid
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CONSTANT_TSC ⟷ TSC ticks at a constant rate
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CPB ⟷ AMD Core Performance Boost
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CPUID ⟷ CPU has CPUID instruction itself
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CPUID_FAULT ⟷ Intel CPUID faulting
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CQM ⟷ Cache QoS Monitoring
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CQM_LLC ⟷ LLC QoS if 1
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CQM_MBM_LOCAL ⟷ LLC Local MBM monitoring
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CQM_MBM_TOTAL ⟷ LLC Total MBM monitoring
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CQM_OCCUP_LLC ⟷ LLC occupancy monitoring if 1
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CR8_LEGACY ⟷ CR8 in 32-bit mode
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CX16 ⟷ CMPXCHG16B
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CX8 ⟷ CMPXCHG8 instruction
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CXMMX ⟷ Cyrix MMX extensions
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CYRIX_ARR ⟷ Cyrix ARRs (= MTRRs)
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DCA ⟷ Direct Cache Access
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DECODEASSISTS ⟷ Decode Assists support
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DE ⟷ Debugging Extensions
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DS_CPL ⟷ CPL Qual. Debug Store
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DTES64 ⟷ 64-bit Debug Store
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DTHERM ⟷ Digital Thermal Sensor
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DTS ⟷ Debug Store
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EPB ⟷ IA32_ENERGY_PERF_BIAS support
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EPT ⟷ Intel Extended Page Table
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ERMS ⟷ Enhanced REP MOVSB/STOSB
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EST ⟷ Enhanced SpeedStep
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EXTAPIC ⟷ Extended APIC space
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EXTD ⟷ APICID has extended APICID (8 bits)
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F16C ⟷ 16-bit fp conversions
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FLEXPRIORITY ⟷ Intel FlexPriority
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FLUSHBYASID ⟷ flush-by-ASID support
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FMA44 ⟷ operands MAC instructions
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FMA ⟷ Fused multiply-add
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FPU ⟷ Onboard FPU
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FSGSBASE ⟷ {RD/WR}{FS/GS}BASE instructions
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FXSR ⟷ FXSAVE/FXRSTOR, CR4.OSFXSR
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FXSR_OPT ⟷ FXSAVE/FXRSTOR optimizations
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HLE ⟷ Hardware Lock Elision
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HT ⟷ Hyper-Threading
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HWP_ACT_WINDOW ⟷ HWP Activity Window
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HWP_EPP ⟷ HWP Energy Perf. Preference
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HWP ⟷ Intel Hardware P-states
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HWP_NOTIFY ⟷ HWP Notification
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HWP_PKG_REQ ⟷ HWP Package Level Request
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HW_PSTATE ⟷ AMD HW-PState
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HYPERVISOR ⟷ Running on a hypervisor
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IA64 ⟷ IA-64 processor
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IBS ⟷ Instruction Based Sampling
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IDA ⟷ Intel Dynamic Acceleration
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INTEL_PPIN ⟷ Intel Processor Inventory Number
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INTEL_PT ⟷ Intel Processor Trace
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INVPCID ⟷ Invalidate Processor Context ID
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IRPERF ⟷ Instructions Retired Count
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K7 ⟷ Athlon
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K8 ⟷ Opteron, Athlon64
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LA57 ⟷ 5-level page tables
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LAHF_LM ⟷ LAHF/SAHF in long mode
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LBRVLBR ⟷ Virtualization support
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LFENCE_RDTSC ⟷ Lfence synchronizes RDTSC
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LM ⟷ Long Mode (x86-64)
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LONGRUN ⟷ Longrun power control
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LRTI ⟷ LongRun table interface
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LWP ⟷ Light Weight Profiling
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MBA ⟷ Memory Bandwidth Allocation
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MCA ⟷ Machine Check Architecture
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MCE ⟷ Machine Check Exception
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MFENCE_RDTSC ⟷ Mfence synchronizes RDTSC
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MISALIGNSSE ⟷ Misaligned SSE mode
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MMXEXTAMD ⟷ MMX extensions
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MMX ⟷ Multimedia Extensions
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MONITOR ⟷ Monitor/Mwait support
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MOVBE ⟷ MOVBE instruction
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MP ⟷ MP Capable.
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MPX ⟷ Memory Protection Extension
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MSR ⟷ Model-Specific Registers
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MTRR ⟷ Memory Type Range Registers
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MWAITX ⟷ MWAIT extension (MONITORX/MWAITX)
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NODEID ⟷ MSRNodeId MSR
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NONSTOP_TSC_S3 ⟷ TSC doesn't stop in S3 state
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NONSTOP_TSC ⟷ TSC does not stop in C states
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NOPL ⟷ instructions
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NPT ⟷ Nested Page Table support
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NRIP_SAVE ⟷ SVM next_rip save
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NX ⟷ Execute Disable
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OSPKEOS ⟷ Protection Keys Enable
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OSVWOS ⟷ Visible Workaround
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OSXSAVE ⟷ XSAVE enabled in the OS
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OVERFLOW_RECOV ⟷ MCA overflow recovery support
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P3 ⟷ P3
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P4 ⟷ P4
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PAE ⟷ Physical Address Extensions
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PAT ⟷ Page Attribute Table
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PAUSEFILTER ⟷ filtered pause intercept
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PBE ⟷ Pending Break Enable
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PCID ⟷ Process Context Identifiers
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PCLMULQDQ ⟷ PCLMULQDQ instruction
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PDCM ⟷ Performance Capabilities
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PDPE1GB ⟷ GB pages
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PEBS ⟷ Precise-Event Based Sampling
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PERFCTR_CORE ⟷ core performance counter extensions
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PERFCTR_LLC ⟷ Last Level Cache performance counter extensions
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PERFCTR_NB ⟷ NB performance counter extensions
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PFTHRESHOLD ⟷ pause filter threshold
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PGE ⟷ Page Global Enable
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PHE ⟷ ENPHE enabled
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PHE ⟷ PadLock Hash Engine
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PKU ⟷ Protection Keys for Userspace
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PLN ⟷ Intel Power Limit Notification
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PMM_EN ⟷ PMM enabled
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PMM ⟷ PadLock Montgomery Multiplier
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PNI ⟷ SSE-3
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PN ⟷ Processor serial number
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POPCNT ⟷ POPCNT instruction
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PROC_FEEDBACK ⟷ AMD ProcFeedbackInterface
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PSE36 ⟷ 36-bit PSEs
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PSE ⟷ Page Size Extensions
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PTSC ⟷ performance time-stamp counter
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PTS ⟷ Intel Package Thermal Status
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RDPID ⟷ RDPIDinstruction
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RDRAND ⟷ The RDRAND instruction
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RDSEED ⟷ The RDSEED instruction
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RDT_A ⟷ Resource Director Technology Allocation
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RDTSCP ⟷ RDTSCP
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RECOVERY ⟷ CPU in recovery mode
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REP_GOOD ⟷ rep microcode works well
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RING3MWAIT ⟷ Ring 3 MONITOR/MWAIT
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RNG_EN ⟷ RNG enabled
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RNG ⟷ RNG present (xstore)
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RTM ⟷ Restricted Transactional Memory
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SDBG ⟷ Silicon Debug
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SEP ⟷ SYSENTER/SYSEXIT
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SHA_NI ⟷ SHA1/SHA256 Instruction Extensions
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SKINIT ⟷ SKINIT/STGI instructions
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SMAP ⟷ Supervisor Mode Access Prevention
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SMCA ⟷ Scalable MCA
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SME ⟷ AMD Secure Memory Encryption
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SMEP ⟷ Supervisor Mode Execution Protection
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SMX ⟷ Safer mode
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SS ⟷ CPU self snoop
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SSE2 ⟷ sse2
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SSE4_1 ⟷ SSE-4.1
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SSE4_2 ⟷ SSE-4.2
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SSE4A ⟷ SSE-4A
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SSE ⟷ sse
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SSSE3 ⟷ Supplemental SSE-3
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SUCCOR ⟷ Uncorrectable error containment and recovery
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SVM_LOCK ⟷ SVM locking MSR
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SVM ⟷ Secure virtual machine
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SYSCALL32 ⟷ syscall in ia32 userspace
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SYSCALL ⟷ SYSCALL/SYSRET
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SYSENTER32 ⟷ sysenter in ia32 userspace
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TBM ⟷ trailing bit manipulations
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TCE ⟷ translation cache extension
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TM2 ⟷ Thermal Monitor 2
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TM ⟷ Automatic clock control
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TOPOEXT ⟷ topology extensions CPUID leafs
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TPR_SHADOW ⟷ Intel TPR Shadow
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TSC_ADJUST ⟷ TSC adjustment MSR 0x3b
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TSC_DEADLINE_TIMER ⟷ Tsc deadline timer
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TSC_KNOWN_FREQ ⟷ TSC has known frequency
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TSC_RELIABLE ⟷ TSC is known to be reliable
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TSC_SCALE ⟷ TSC scaling support
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TSC ⟷ Time Stamp Counter
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UP ⟷ smp kernel running on up
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VGIF ⟷ Virtual GIF
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VMCB_CLEAN ⟷ VMCB clean bits support
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VME ⟷ Virtual Mode Extensions
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VMMCALL ⟷ Prefer vmmcall to vmcall
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VMX ⟷ Hardware virtualization
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VNMI ⟷ Intel Virtual NMI
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VPID ⟷ Intel Virtual Processor ID
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V_VMSAVE_VMLOAD ⟷ Virtual VMSAVE VMLOAD
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WDT ⟷ Watchdog timer
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X2APIC ⟷ x2APIC
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XENPV ⟷ Xen paravirtual guest
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XGETBV1 ⟷ XGETBV with ECX = 1
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XOP ⟷ extended AVX instructions
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XSAVEC ⟷ XSAVEC
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XSAVEOPT ⟷ XSAVEOPT
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XSAVES ⟷ XSAVES/XRSTORS
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XSAVE ⟷ XSAVE/XRSTOR/XSETBV/XGETBV
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XTOPOLOGY ⟷ cpu topology enum extensions
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XTPR ⟷ Send Task Priority Messages
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```
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